[PATCH] D109314: [AArch64] Implement extract_subvector for predicates.

Caroline via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 7 05:34:39 PDT 2021


CarolineConcatto accepted this revision.
CarolineConcatto added a comment.
This revision is now accepted and ready to land.

Thank you Sander!
It is nice to see that it also works for types like:
 <vscale x 2 x i1> @llvm.experimental.vector.extract.nxv2i1.nxv6i1(<vscale x 6 x i1>, i64)
 <vscale x 2 x i1> @llvm.experimental.vector.extract.nxv2i1.nxv12i1(<vscale x 12 x i1>, i64)
It would be too much if you add a test for these types/strides too?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109314/new/

https://reviews.llvm.org/D109314



More information about the llvm-commits mailing list