[PATCH] D109313: [SelectionDAG] PromoteIntRes_EXTRACT_SUBVECTOR for scalable vectors.

Caroline via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 7 05:34:08 PDT 2021


CarolineConcatto added a comment.

Hey Sander,
That is a nice patch.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:4738
+      unsigned NElts = NInVT.getVectorMinNumElements();
+      uint64_t IdxVal = cast<ConstantSDNode>(BaseIdx)->getZExtValue();
+
----------------
It would not be best if NElts and IdxVal be the same type?
Both should be unsigned or uint64_t.

In the same topic, why getZExtValue the index?


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:4741
+      SDValue Step1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NInVT, InOp0,
+                                  DAG.getConstant((IdxVal / NElts) * NElts, dl,
+                                                  BaseIdx.getValueType()));
----------------
Should this be:
  DAG.getConstant((IdxVal, dl, ...
Because:
(IdxVal / NElts) * NElts =. IdxVal?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109313/new/

https://reviews.llvm.org/D109313



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