[llvm] bf5a31b - [X86] Pre-commit test cases for D109295. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-09-06T10:22:48-07:00
New Revision: bf5a31bb9a900b5b2dcc1e035e426a5dbd9ba9a2

URL: https://github.com/llvm/llvm-project/commit/bf5a31bb9a900b5b2dcc1e035e426a5dbd9ba9a2
DIFF: https://github.com/llvm/llvm-project/commit/bf5a31bb9a900b5b2dcc1e035e426a5dbd9ba9a2.diff

LOG: [X86] Pre-commit test cases for D109295. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/avx512vl-logic.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/avx512vl-logic.ll b/llvm/test/CodeGen/X86/avx512vl-logic.ll
index 72de9adcbd36..e7bbe2d3fce9 100644
--- a/llvm/test/CodeGen/X86/avx512vl-logic.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-logic.ll
@@ -977,6 +977,55 @@ define <4 x i32> @ternlog_or_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
   ret <4 x i32> %c
 }
 
+define <4 x i32> @ternlog_and_orn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
+; CHECK-LABEL: ternlog_and_orn:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpternlogq $15, %xmm2, %xmm2, %xmm2
+; CHECK-NEXT:    vpternlogd $224, %xmm1, %xmm2, %xmm0
+; CHECK-NEXT:    retq
+  %a = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
+  %b = or <4 x i32> %a, %y
+  %c = and <4 x i32> %b, %x
+  ret <4 x i32> %c
+}
+
+define <4 x i32> @ternlog_and_orn_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
+; CHECK-LABEL: ternlog_and_orn_2:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpternlogq $15, %xmm2, %xmm2, %xmm2
+; CHECK-NEXT:    vpternlogd $224, %xmm2, %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %a = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
+  %b = or <4 x i32> %y, %a
+  %c = and <4 x i32> %b, %x
+  ret <4 x i32> %c
+}
+
+define <4 x i32> @ternlog_orn_and(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
+; CHECK-LABEL: ternlog_orn_and:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpcmpeqd %xmm3, %xmm3, %xmm3
+; CHECK-NEXT:    vpand %xmm2, %xmm1, %xmm1
+; CHECK-NEXT:    vpternlogd $222, %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
+  %b = and <4 x i32> %y, %z
+  %c = or <4 x i32> %b, %a
+  ret <4 x i32> %c
+}
+
+define <4 x i32> @ternlog_orn_and_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
+; CHECK-LABEL: ternlog_orn_and_2:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpternlogq $15, %xmm0, %xmm0, %xmm0
+; CHECK-NEXT:    vpternlogd $248, %xmm2, %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
+  %b = and <4 x i32> %y, %z
+  %c = or <4 x i32> %a, %b
+  ret <4 x i32> %c
+}
+
 define <4 x i32> @ternlog_xor_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
 ; CHECK-LABEL: ternlog_xor_andn:
 ; CHECK:       ## %bb.0: