[PATCH] D109295: [X86] Handle inverted inputs when matching VPTERNLOG from 2 binary ops.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 6 07:16:30 PDT 2021
LuoYuanke added a comment.
In D109295#2985246 <https://reviews.llvm.org/D109295#2985246>, @pengfei wrote:
> I found another example:
>
> define dso_local <4 x i64> @foo2(<4 x i64> %0, <4 x i64> %1, <4 x i64> %2) {
> %4 = xor <4 x i64> %2, <i64 -1, i64 -1, i64 -1, i64 -1>
> %5 = or <4 x i64> %4, %1
> %6 = or <4 x i64> %0, %1
> %7 = and <4 x i64> %5, %6
> ret <4 x i64> %7
> }
>
> Can we simply it to below in the approach?
>
> vpor %ymm1, %ymm0, %ymm0
> vpternlogq $208, %ymm2, %ymm1, %ymm0
> retq
Seem no with current vpternlog framework. We currently only support A op1 (B op2 C). Not figured out how to extend the framework to accept more operators as long as there is 3 source bit.
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https://reviews.llvm.org/D109295/new/
https://reviews.llvm.org/D109295
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