[PATCH] D109082: [AMDGPU] Use S_BITCMP1_* to replace AND in optimizeCompareInstr

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D109082#2978991 <https://reviews.llvm.org/D109082#2978991>, @foad wrote:

> Shouldn't we have normal instructions selection patterns for s_bitcmp0/1? Would this patch still be required if we had that?

I don't think so. First you cannot probably cover all scenarios with selection patterns, including patterns introduced by user's code. Second the moment you will introduce these instructions you will have to handle it everywhere, starting with moveToVALU. My idea it is better to stick with normal compares and replace it later when you done with potential transformations.

One thing which can be done is to also add this to SIShrinkInstructions, so it does not depend on the presence of a compare. That however will not allow reversing of the condition like in the subsequent patch as it needs to work together with a compare.

Lastly this optimization is independent of the selection, so agnostic to the type of ISel.

I.e. to my view relying on an ISel is a layering violation. ISel is like an FE for MI passes, they shall handle whatever is dumped on them as good as they can unless information is lost in the selection, just like a BE shall handle whatever an unoptimized FE creates unless it loses semantics info.


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