[llvm] 7d062d2 - [X86][Atom] MUL/DIV instructions require both ports, not either.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 4 03:58:27 PDT 2021
Author: Simon Pilgrim
Date: 2021-09-04T11:58:09+01:00
New Revision: 7d062d2c478b713ba7ac31729259d747fdd7d0b3
URL: https://github.com/llvm/llvm-project/commit/7d062d2c478b713ba7ac31729259d747fdd7d0b3
DIFF: https://github.com/llvm/llvm-project/commit/7d062d2c478b713ba7ac31729259d747fdd7d0b3.diff
LOG: [X86][Atom] MUL/DIV instructions require both ports, not either.
Noticed while trying to improve multiplication costs for vectorization via the D103695 helper script. Confirmed with Intel AoM.
Added:
Modified:
llvm/lib/Target/X86/X86ScheduleAtom.td
llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td
index 7a02f5834b265..796baa25a6990 100644
--- a/llvm/lib/Target/X86/X86ScheduleAtom.td
+++ b/llvm/lib/Target/X86/X86ScheduleAtom.td
@@ -84,16 +84,16 @@ def : WriteRes<WriteRMW, [AtomPort0]>;
defm : AtomWriteResPair<WriteALU, [AtomPort01], [AtomPort0]>;
defm : AtomWriteResPair<WriteADC, [AtomPort01], [AtomPort0]>;
-defm : AtomWriteResPair<WriteIMul8, [AtomPort01], [AtomPort01], 7, 7, [7], [7]>;
-defm : AtomWriteResPair<WriteIMul16, [AtomPort01], [AtomPort01], 7, 8, [7], [8]>;
-defm : AtomWriteResPair<WriteIMul16Imm, [AtomPort01], [AtomPort01], 6, 7, [6], [7]>;
-defm : AtomWriteResPair<WriteIMul16Reg, [AtomPort01], [AtomPort01], 6, 7, [6], [7]>;
-defm : AtomWriteResPair<WriteIMul32, [AtomPort01], [AtomPort01], 6, 7, [6], [7]>;
+defm : AtomWriteResPair<WriteIMul8, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 7, 7, [7,7], [7,7]>;
+defm : AtomWriteResPair<WriteIMul16, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 7, 8, [7,7], [8,8]>;
+defm : AtomWriteResPair<WriteIMul16Imm, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 6, 7, [6,6], [7,7]>;
+defm : AtomWriteResPair<WriteIMul16Reg, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 6, 7, [6,6], [7,7]>;
+defm : AtomWriteResPair<WriteIMul32, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 6, 7, [6,6], [7,7]>;
defm : AtomWriteResPair<WriteIMul32Imm, [AtomPort0], [AtomPort0], 5, 5, [5], [5]>;
defm : AtomWriteResPair<WriteIMul32Reg, [AtomPort0], [AtomPort0], 5, 5, [5], [5]>;
-defm : AtomWriteResPair<WriteIMul64, [AtomPort01], [AtomPort01], 12, 12, [12], [12]>;
-defm : AtomWriteResPair<WriteIMul64Imm, [AtomPort01], [AtomPort01], 14, 14, [14], [14]>;
-defm : AtomWriteResPair<WriteIMul64Reg, [AtomPort01], [AtomPort01], 12, 12, [12], [12]>;
+defm : AtomWriteResPair<WriteIMul64, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 12, 12, [12,12], [12,12]>;
+defm : AtomWriteResPair<WriteIMul64Imm, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 14, 14, [14,14], [14,14]>;
+defm : AtomWriteResPair<WriteIMul64Reg, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 12, 12, [12,12], [12,12]>;
defm : X86WriteResUnsupported<WriteIMulH>;
defm : X86WriteResUnsupported<WriteIMulHLd>;
defm : X86WriteResPairUnsupported<WriteMULX32>;
@@ -105,14 +105,14 @@ defm : X86WriteRes<WriteBSWAP64, [AtomPort0], 1, [1], 1>;
defm : AtomWriteResPair<WriteCMPXCHG, [AtomPort01], [AtomPort01], 15, 15, [15]>;
defm : X86WriteRes<WriteCMPXCHGRMW, [AtomPort01, AtomPort0], 1, [1, 1], 1>;
-defm : AtomWriteResPair<WriteDiv8, [AtomPort01], [AtomPort01], 50, 68, [50], [68]>;
-defm : AtomWriteResPair<WriteDiv16, [AtomPort01], [AtomPort01], 50, 50, [50], [50]>;
-defm : AtomWriteResPair<WriteDiv32, [AtomPort01], [AtomPort01], 50, 50, [50], [50]>;
-defm : AtomWriteResPair<WriteDiv64, [AtomPort01], [AtomPort01],130,130,[130],[130]>;
-defm : AtomWriteResPair<WriteIDiv8, [AtomPort01], [AtomPort01], 62, 62, [62], [62]>;
-defm : AtomWriteResPair<WriteIDiv16, [AtomPort01], [AtomPort01], 62, 62, [62], [62]>;
-defm : AtomWriteResPair<WriteIDiv32, [AtomPort01], [AtomPort01], 62, 62, [62], [62]>;
-defm : AtomWriteResPair<WriteIDiv64, [AtomPort01], [AtomPort01],130,130,[130],[130]>;
+defm : AtomWriteResPair<WriteDiv8, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 50, 68, [50,50], [68,68]>;
+defm : AtomWriteResPair<WriteDiv16, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 50, 50, [50,50], [50,50]>;
+defm : AtomWriteResPair<WriteDiv32, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 50, 50, [50,50], [50,50]>;
+defm : AtomWriteResPair<WriteDiv64, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1],130,130,[130,130],[130,130]>;
+defm : AtomWriteResPair<WriteIDiv8, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 62, 62, [62,62], [62,62]>;
+defm : AtomWriteResPair<WriteIDiv16, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 62, 62, [62,62], [62,62]>;
+defm : AtomWriteResPair<WriteIDiv32, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1], 62, 62, [62,62], [62,62]>;
+defm : AtomWriteResPair<WriteIDiv64, [AtomPort0,AtomPort1], [AtomPort0,AtomPort1],130,130,[130,130],[130,130]>;
defm : X86WriteResPairUnsupported<WriteCRC32>;
diff --git a/llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
index db3cf6f931004..574cb2b7ccce9 100644
--- a/llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
@@ -1317,49 +1317,49 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 0.50 decq %rdi
# CHECK-NEXT: 1 1 1.00 * * decq (%rax)
# CHECK-NEXT: 1 1 1.00 * * lock decq (%rax)
-# CHECK-NEXT: 1 50 25.00 U divb %dil
-# CHECK-NEXT: 1 68 34.00 * U divb (%rax)
-# CHECK-NEXT: 1 50 25.00 U divw %si
-# CHECK-NEXT: 1 50 25.00 * U divw (%rax)
-# CHECK-NEXT: 1 50 25.00 U divl %edx
-# CHECK-NEXT: 1 50 25.00 * U divl (%rax)
-# CHECK-NEXT: 1 130 65.00 U divq %rcx
-# CHECK-NEXT: 1 130 65.00 * U divq (%rax)
+# CHECK-NEXT: 1 50 50.00 U divb %dil
+# CHECK-NEXT: 1 68 68.00 * U divb (%rax)
+# CHECK-NEXT: 1 50 50.00 U divw %si
+# CHECK-NEXT: 1 50 50.00 * U divw (%rax)
+# CHECK-NEXT: 1 50 50.00 U divl %edx
+# CHECK-NEXT: 1 50 50.00 * U divl (%rax)
+# CHECK-NEXT: 1 130 130.00 U divq %rcx
+# CHECK-NEXT: 1 130 130.00 * U divq (%rax)
# CHECK-NEXT: 1 32 16.00 U enter $7, $4095
-# CHECK-NEXT: 1 62 31.00 U idivb %dil
-# CHECK-NEXT: 1 62 31.00 * U idivb (%rax)
-# CHECK-NEXT: 1 62 31.00 U idivw %si
-# CHECK-NEXT: 1 62 31.00 * U idivw (%rax)
-# CHECK-NEXT: 1 62 31.00 U idivl %edx
-# CHECK-NEXT: 1 62 31.00 * U idivl (%rax)
-# CHECK-NEXT: 1 130 65.00 U idivq %rcx
-# CHECK-NEXT: 1 130 65.00 * U idivq (%rax)
-# CHECK-NEXT: 1 7 3.50 imulb %dil
-# CHECK-NEXT: 1 7 3.50 * imulb (%rax)
-# CHECK-NEXT: 1 7 3.50 imulw %di
-# CHECK-NEXT: 1 8 4.00 * imulw (%rax)
-# CHECK-NEXT: 1 6 3.00 imulw %si, %di
-# CHECK-NEXT: 1 7 3.50 * imulw (%rax), %di
-# CHECK-NEXT: 1 6 3.00 imulw $511, %si, %di
-# CHECK-NEXT: 1 7 3.50 * imulw $511, (%rax), %di
-# CHECK-NEXT: 1 6 3.00 imulw $7, %si, %di
-# CHECK-NEXT: 1 7 3.50 * imulw $7, (%rax), %di
-# CHECK-NEXT: 1 6 3.00 imull %edi
-# CHECK-NEXT: 1 7 3.50 * imull (%rax)
+# CHECK-NEXT: 1 62 62.00 U idivb %dil
+# CHECK-NEXT: 1 62 62.00 * U idivb (%rax)
+# CHECK-NEXT: 1 62 62.00 U idivw %si
+# CHECK-NEXT: 1 62 62.00 * U idivw (%rax)
+# CHECK-NEXT: 1 62 62.00 U idivl %edx
+# CHECK-NEXT: 1 62 62.00 * U idivl (%rax)
+# CHECK-NEXT: 1 130 130.00 U idivq %rcx
+# CHECK-NEXT: 1 130 130.00 * U idivq (%rax)
+# CHECK-NEXT: 1 7 7.00 imulb %dil
+# CHECK-NEXT: 1 7 7.00 * imulb (%rax)
+# CHECK-NEXT: 1 7 7.00 imulw %di
+# CHECK-NEXT: 1 8 8.00 * imulw (%rax)
+# CHECK-NEXT: 1 6 6.00 imulw %si, %di
+# CHECK-NEXT: 1 7 7.00 * imulw (%rax), %di
+# CHECK-NEXT: 1 6 6.00 imulw $511, %si, %di
+# CHECK-NEXT: 1 7 7.00 * imulw $511, (%rax), %di
+# CHECK-NEXT: 1 6 6.00 imulw $7, %si, %di
+# CHECK-NEXT: 1 7 7.00 * imulw $7, (%rax), %di
+# CHECK-NEXT: 1 6 6.00 imull %edi
+# CHECK-NEXT: 1 7 7.00 * imull (%rax)
# CHECK-NEXT: 1 5 5.00 imull %esi, %edi
# CHECK-NEXT: 1 5 5.00 * imull (%rax), %edi
# CHECK-NEXT: 1 5 5.00 imull $665536, %esi, %edi
# CHECK-NEXT: 1 5 5.00 * imull $665536, (%rax), %edi
# CHECK-NEXT: 1 5 5.00 imull $7, %esi, %edi
# CHECK-NEXT: 1 5 5.00 * imull $7, (%rax), %edi
-# CHECK-NEXT: 1 12 6.00 imulq %rdi
-# CHECK-NEXT: 1 12 6.00 * imulq (%rax)
-# CHECK-NEXT: 1 12 6.00 imulq %rsi, %rdi
-# CHECK-NEXT: 1 12 6.00 * imulq (%rax), %rdi
-# CHECK-NEXT: 1 14 7.00 imulq $665536, %rsi, %rdi
-# CHECK-NEXT: 1 14 7.00 * imulq $665536, (%rax), %rdi
-# CHECK-NEXT: 1 14 7.00 imulq $7, %rsi, %rdi
-# CHECK-NEXT: 1 14 7.00 * imulq $7, (%rax), %rdi
+# CHECK-NEXT: 1 12 12.00 imulq %rdi
+# CHECK-NEXT: 1 12 12.00 * imulq (%rax)
+# CHECK-NEXT: 1 12 12.00 imulq %rsi, %rdi
+# CHECK-NEXT: 1 12 12.00 * imulq (%rax), %rdi
+# CHECK-NEXT: 1 14 14.00 imulq $665536, %rsi, %rdi
+# CHECK-NEXT: 1 14 14.00 * imulq $665536, (%rax), %rdi
+# CHECK-NEXT: 1 14 14.00 imulq $7, %rsi, %rdi
+# CHECK-NEXT: 1 14 14.00 * imulq $7, (%rax), %rdi
# CHECK-NEXT: 1 92 46.00 U inb $7, %al
# CHECK-NEXT: 1 94 47.00 U inb %dx, %al
# CHECK-NEXT: 1 92 46.00 U inw $7, %ax
@@ -1416,14 +1416,14 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 * movzwq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 movslq %eax, %rdi
# CHECK-NEXT: 1 1 1.00 * movslq (%rax), %rdi
-# CHECK-NEXT: 1 7 3.50 mulb %dil
-# CHECK-NEXT: 1 7 3.50 * mulb (%rax)
-# CHECK-NEXT: 1 7 3.50 mulw %si
-# CHECK-NEXT: 1 8 4.00 * mulw (%rax)
-# CHECK-NEXT: 1 6 3.00 mull %edx
-# CHECK-NEXT: 1 7 3.50 * mull (%rax)
-# CHECK-NEXT: 1 12 6.00 mulq %rcx
-# CHECK-NEXT: 1 12 6.00 * mulq (%rax)
+# CHECK-NEXT: 1 7 7.00 mulb %dil
+# CHECK-NEXT: 1 7 7.00 * mulb (%rax)
+# CHECK-NEXT: 1 7 7.00 mulw %si
+# CHECK-NEXT: 1 8 8.00 * mulw (%rax)
+# CHECK-NEXT: 1 6 6.00 mull %edx
+# CHECK-NEXT: 1 7 7.00 * mull (%rax)
+# CHECK-NEXT: 1 12 12.00 mulq %rcx
+# CHECK-NEXT: 1 12 12.00 * mulq (%rax)
# CHECK-NEXT: 1 1 0.50 negb %dil
# CHECK-NEXT: 1 1 1.00 * * negb (%r8)
# CHECK-NEXT: 1 1 1.00 * * lock negb (%r8)
@@ -1947,7 +1947,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1]
-# CHECK-NEXT: 2886.00 2433.00
+# CHECK-NEXT: 3616.50 3163.50
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] Instructions:
@@ -2238,49 +2238,49 @@ xorq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 decq %rdi
# CHECK-NEXT: 1.00 - decq (%rax)
# CHECK-NEXT: 1.00 - lock decq (%rax)
-# CHECK-NEXT: 25.00 25.00 divb %dil
-# CHECK-NEXT: 34.00 34.00 divb (%rax)
-# CHECK-NEXT: 25.00 25.00 divw %si
-# CHECK-NEXT: 25.00 25.00 divw (%rax)
-# CHECK-NEXT: 25.00 25.00 divl %edx
-# CHECK-NEXT: 25.00 25.00 divl (%rax)
-# CHECK-NEXT: 65.00 65.00 divq %rcx
-# CHECK-NEXT: 65.00 65.00 divq (%rax)
+# CHECK-NEXT: 50.00 50.00 divb %dil
+# CHECK-NEXT: 68.00 68.00 divb (%rax)
+# CHECK-NEXT: 50.00 50.00 divw %si
+# CHECK-NEXT: 50.00 50.00 divw (%rax)
+# CHECK-NEXT: 50.00 50.00 divl %edx
+# CHECK-NEXT: 50.00 50.00 divl (%rax)
+# CHECK-NEXT: 130.00 130.00 divq %rcx
+# CHECK-NEXT: 130.00 130.00 divq (%rax)
# CHECK-NEXT: 16.00 16.00 enter $7, $4095
-# CHECK-NEXT: 31.00 31.00 idivb %dil
-# CHECK-NEXT: 31.00 31.00 idivb (%rax)
-# CHECK-NEXT: 31.00 31.00 idivw %si
-# CHECK-NEXT: 31.00 31.00 idivw (%rax)
-# CHECK-NEXT: 31.00 31.00 idivl %edx
-# CHECK-NEXT: 31.00 31.00 idivl (%rax)
-# CHECK-NEXT: 65.00 65.00 idivq %rcx
-# CHECK-NEXT: 65.00 65.00 idivq (%rax)
-# CHECK-NEXT: 3.50 3.50 imulb %dil
-# CHECK-NEXT: 3.50 3.50 imulb (%rax)
-# CHECK-NEXT: 3.50 3.50 imulw %di
-# CHECK-NEXT: 4.00 4.00 imulw (%rax)
-# CHECK-NEXT: 3.00 3.00 imulw %si, %di
-# CHECK-NEXT: 3.50 3.50 imulw (%rax), %di
-# CHECK-NEXT: 3.00 3.00 imulw $511, %si, %di
-# CHECK-NEXT: 3.50 3.50 imulw $511, (%rax), %di
-# CHECK-NEXT: 3.00 3.00 imulw $7, %si, %di
-# CHECK-NEXT: 3.50 3.50 imulw $7, (%rax), %di
-# CHECK-NEXT: 3.00 3.00 imull %edi
-# CHECK-NEXT: 3.50 3.50 imull (%rax)
+# CHECK-NEXT: 62.00 62.00 idivb %dil
+# CHECK-NEXT: 62.00 62.00 idivb (%rax)
+# CHECK-NEXT: 62.00 62.00 idivw %si
+# CHECK-NEXT: 62.00 62.00 idivw (%rax)
+# CHECK-NEXT: 62.00 62.00 idivl %edx
+# CHECK-NEXT: 62.00 62.00 idivl (%rax)
+# CHECK-NEXT: 130.00 130.00 idivq %rcx
+# CHECK-NEXT: 130.00 130.00 idivq (%rax)
+# CHECK-NEXT: 7.00 7.00 imulb %dil
+# CHECK-NEXT: 7.00 7.00 imulb (%rax)
+# CHECK-NEXT: 7.00 7.00 imulw %di
+# CHECK-NEXT: 8.00 8.00 imulw (%rax)
+# CHECK-NEXT: 6.00 6.00 imulw %si, %di
+# CHECK-NEXT: 7.00 7.00 imulw (%rax), %di
+# CHECK-NEXT: 6.00 6.00 imulw $511, %si, %di
+# CHECK-NEXT: 7.00 7.00 imulw $511, (%rax), %di
+# CHECK-NEXT: 6.00 6.00 imulw $7, %si, %di
+# CHECK-NEXT: 7.00 7.00 imulw $7, (%rax), %di
+# CHECK-NEXT: 6.00 6.00 imull %edi
+# CHECK-NEXT: 7.00 7.00 imull (%rax)
# CHECK-NEXT: 5.00 - imull %esi, %edi
# CHECK-NEXT: 5.00 - imull (%rax), %edi
# CHECK-NEXT: 5.00 - imull $665536, %esi, %edi
# CHECK-NEXT: 5.00 - imull $665536, (%rax), %edi
# CHECK-NEXT: 5.00 - imull $7, %esi, %edi
# CHECK-NEXT: 5.00 - imull $7, (%rax), %edi
-# CHECK-NEXT: 6.00 6.00 imulq %rdi
-# CHECK-NEXT: 6.00 6.00 imulq (%rax)
-# CHECK-NEXT: 6.00 6.00 imulq %rsi, %rdi
-# CHECK-NEXT: 6.00 6.00 imulq (%rax), %rdi
-# CHECK-NEXT: 7.00 7.00 imulq $665536, %rsi, %rdi
-# CHECK-NEXT: 7.00 7.00 imulq $665536, (%rax), %rdi
-# CHECK-NEXT: 7.00 7.00 imulq $7, %rsi, %rdi
-# CHECK-NEXT: 7.00 7.00 imulq $7, (%rax), %rdi
+# CHECK-NEXT: 12.00 12.00 imulq %rdi
+# CHECK-NEXT: 12.00 12.00 imulq (%rax)
+# CHECK-NEXT: 12.00 12.00 imulq %rsi, %rdi
+# CHECK-NEXT: 12.00 12.00 imulq (%rax), %rdi
+# CHECK-NEXT: 14.00 14.00 imulq $665536, %rsi, %rdi
+# CHECK-NEXT: 14.00 14.00 imulq $665536, (%rax), %rdi
+# CHECK-NEXT: 14.00 14.00 imulq $7, %rsi, %rdi
+# CHECK-NEXT: 14.00 14.00 imulq $7, (%rax), %rdi
# CHECK-NEXT: 46.00 46.00 inb $7, %al
# CHECK-NEXT: 47.00 47.00 inb %dx, %al
# CHECK-NEXT: 46.00 46.00 inw $7, %ax
@@ -2337,14 +2337,14 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1.00 - movzwq (%rax), %rdi
# CHECK-NEXT: 1.00 - movslq %eax, %rdi
# CHECK-NEXT: 1.00 - movslq (%rax), %rdi
-# CHECK-NEXT: 3.50 3.50 mulb %dil
-# CHECK-NEXT: 3.50 3.50 mulb (%rax)
-# CHECK-NEXT: 3.50 3.50 mulw %si
-# CHECK-NEXT: 4.00 4.00 mulw (%rax)
-# CHECK-NEXT: 3.00 3.00 mull %edx
-# CHECK-NEXT: 3.50 3.50 mull (%rax)
-# CHECK-NEXT: 6.00 6.00 mulq %rcx
-# CHECK-NEXT: 6.00 6.00 mulq (%rax)
+# CHECK-NEXT: 7.00 7.00 mulb %dil
+# CHECK-NEXT: 7.00 7.00 mulb (%rax)
+# CHECK-NEXT: 7.00 7.00 mulw %si
+# CHECK-NEXT: 8.00 8.00 mulw (%rax)
+# CHECK-NEXT: 6.00 6.00 mull %edx
+# CHECK-NEXT: 7.00 7.00 mull (%rax)
+# CHECK-NEXT: 12.00 12.00 mulq %rcx
+# CHECK-NEXT: 12.00 12.00 mulq (%rax)
# CHECK-NEXT: 0.50 0.50 negb %dil
# CHECK-NEXT: 1.00 - negb (%r8)
# CHECK-NEXT: 1.00 - lock negb (%r8)
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