[PATCH] D109260: [RISCV] Add SiFive core E20

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Are you planning to add more CPUs? I think I'd be willing to accept them all as one patch instead of one small patch for each CPU.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109260/new/

https://reviews.llvm.org/D109260