[PATCH] D109146: [AArch64][SVE] Replace fmul and fadd LLVM IR instrinsics with fmul and fadd

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau updated this revision to Diff 370529.
MattDevereau added a comment.

Created new method instCombineSVEVectorBinOp and narrowed the intrinsic conditional replacement to svp_true_xx/Intrinsic::aarch64_sve_convert_from_svbool


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109146/new/

https://reviews.llvm.org/D109146

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp


Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -684,6 +684,36 @@
   return None;
 }
 
+static Optional<Instruction *> instCombineSVEVectorBinOp(InstCombiner &IC,
+                                                         IntrinsicInst &II) {
+  auto *OpPredicate = II.getOperand(0);
+  auto *OpMultiplicand = II.getOperand(1);
+  auto *OpMultiplier = II.getOperand(2);
+
+  IRBuilder<> Builder(II.getContext());
+  Builder.SetInsertPoint(&II);
+
+  auto IsIntrinsic = [](auto *I, auto In) {
+    auto *IntrI = dyn_cast<IntrinsicInst>(I);
+    if (!IntrI || IntrI->getIntrinsicID() != In)
+      return false;
+    return true;
+  };
+
+  if (IsIntrinsic(&II, Intrinsic::aarch64_sve_fmul) &&
+      IsIntrinsic(OpPredicate, Intrinsic::aarch64_sve_convert_from_svbool)) {
+    return IC.replaceInstUsesWith(
+        II, Builder.CreateFMul(OpMultiplicand, OpMultiplier));
+  } else if (IsIntrinsic(&II, Intrinsic::aarch64_sve_fadd) &&
+             IsIntrinsic(OpPredicate,
+                         Intrinsic::aarch64_sve_convert_from_svbool)) {
+    return IC.replaceInstUsesWith(
+        II, Builder.CreateFAdd(OpMultiplicand, OpMultiplier));
+  }
+
+  return None;
+}
+
 static Optional<Instruction *> instCombineSVEVectorMul(InstCombiner &IC,
                                                        IntrinsicInst &II) {
   auto *OpPredicate = II.getOperand(0);
@@ -736,7 +766,7 @@
     }
   }
 
-  return None;
+  return instCombineSVEVectorBinOp(IC, II);
 }
 
 static Optional<Instruction *> instCombineSVEUnpack(InstCombiner &IC,
@@ -824,6 +854,8 @@
   case Intrinsic::aarch64_sve_mul:
   case Intrinsic::aarch64_sve_fmul:
     return instCombineSVEVectorMul(IC, II);
+  case Intrinsic::aarch64_sve_fadd:
+    return instCombineSVEVectorBinOp(IC, II);
   case Intrinsic::aarch64_sve_tbl:
     return instCombineSVETBL(IC, II);
   case Intrinsic::aarch64_sve_uunpkhi:


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D109146.370529.patch
Type: text/x-patch
Size: 2076 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210903/e328f939/attachment.bin>