[PATCH] D109041: [ARM] Fix assembly in `tInt_eh_sjlj_longjmp`

[Tee KOBAYASHI via Phabricator via llvm-commits]

xtkoba added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMInstrThumb.td:1548
 let isBarrier = 1, hasSideEffects = 1, isTerminator = 1, isCodeGenOnly = 1,
-    Defs = [ R7, LR, SP ] in
+    Defs = [ R7, R11, LR, SP ] in
 def tInt_eh_sjlj_longjmp : XI<(outs), (ins tGPR:$src, tGPR:$scratch),
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mstorsjo wrote:
> mstorsjo wrote:
> > xtkoba wrote:
> > > xtkoba wrote:
> > > > mstorsjo wrote:
> > > > > This change looks good and seems to have been requested (and missed by me) in D38253, but we should do the same for `Int_eh_sjlj_longjmp` in ARMInstrInfo.td too - can you amend the patch to change that too?
> > > > Now I am preparing for another differential to fix pr50202. The requested change will be included therein.
> > > The requested change is included in D109129.
> > > Now I am preparing for another differential to fix pr50202. The requested change will be included therein.
> > 
> > 
> > Now I am preparing for another differential to fix pr50202. The requested change will be included therein.
> 
> > The requested change is included in D109129.
> 
> Thanks!
> 
> Are you still planning on a different fix than this one for PR50202, or does this one still stand wrt that? (Does this one need similar changes as in D109129, to use a different GPR register class that doesn't include the FP?)
Strictly, `tInt_eh_sjlj_longjmp` should also use a new register class, say `tGPRnofp`, that excludes `r7`. What differentiates Thumb case from ARM case is that in the former users can workaround `r7` from being used as the scratch register in virtue of the compiler option `-fno-omit-frame-pointer`, because `r7` is the sole potential candidate of frame pointer register in Thumb mode.

I will create another differential if need be, but I am not going to include it here or in D109129. These three should be considered as separate problems.


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  https://reviews.llvm.org/D109041/new/

https://reviews.llvm.org/D109041