[PATCH] D109074: [Codegen][TLI][X86] SimplifyMultipleUseDemandedBits(): 0'th vec subreg widening is free, try to perform it earlier

[Roman Lebedev via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf5753125f03a: [Codegen][TLI][X86] SimplifyMultipleUseDemandedBits(): 0'th vec subreg widening… (authored by lebedev.ri).

Changed prior to commit:
  https://reviews.llvm.org/D109074?vs=370069&id=370074#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109074/new/

https://reviews.llvm.org/D109074

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
  llvm/test/CodeGen/X86/avg.ll
  llvm/test/CodeGen/X86/horizontal-sum.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D109074.370074.patch
Type: text/x-patch
Size: 24917 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210901/25a7f4b9/attachment.bin>