[PATCH] D109074: [Codegen][TLI][X86] SimplifyMultipleUseDemandedBits(): 0'th vec subreg widening is free, try to perform it earlier
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 1 14:41:45 PDT 2021
lebedev.ri updated this revision to Diff 370069.
lebedev.ri marked an inline comment as done.
lebedev.ri added a comment.
Thank you for the review!
Address nit.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109074/new/
https://reviews.llvm.org/D109074
Files:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
llvm/test/CodeGen/X86/avg.ll
llvm/test/CodeGen/X86/horizontal-sum.ll
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