[PATCH] D109074: [Codegen][TLI][X86] SimplifyMultipleUseDemandedBits(): 0'th vec subreg widening is free, try to perform it earlier
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 1 14:32:01 PDT 2021
lebedev.ri updated this revision to Diff 370062.
lebedev.ri marked 2 inline comments as done.
lebedev.ri added a comment.
@RKSimon thanks for taking a look!
Address review notes.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109074/new/
https://reviews.llvm.org/D109074
Files:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
llvm/test/CodeGen/X86/avg.ll
llvm/test/CodeGen/X86/horizontal-sum.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D109074.370062.patch
Type: text/x-patch
Size: 26143 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210901/70bdd740/attachment.bin>
More information about the llvm-commits
mailing list