[PATCH] D109008: [AMDGPU][NFC] Refactor AMDGPUCallingConv.td

[Scott Linder via Phabricator via llvm-commits]

scott.linder added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td:147
+//===----------------------------------------------------------------------===//
+//     Compute Calling Conventions
+//===----------------------------------------------------------------------===//
----------------
arsenm wrote:
> It's not entirely accurate since amdgpu_gfx will use the same masks
Ah, fair, I can remove the headings if they don't add any value


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td:230
+
+def CSR_AMDGPU_AllVGPRs : RegMask<
+  (sequence "VGPR%u", 0, 255)
----------------
arsenm wrote:
> Probably shouldn't have the CSR prefix if it's just all registers
I had originally used a different prefix, and considered no prefix, but I wasn't sure if it would be confusing enough in e.g. the MIR to have some masks with the prefix and some without? Is there any risk of colliding with something else in the MIR syntax?


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  https://reviews.llvm.org/D109008/new/

https://reviews.llvm.org/D109008