[PATCH] D108914: [X86] Copy X86SchedSkylakeServer.td to X86SchedIceLake.td
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 31 02:47:13 PDT 2021
RKSimon added a comment.
Thanks everyone
================
Comment at: llvm/lib/Target/X86/X86SchedIceLake.td:143
+def : WriteRes<WriteIMulHLd, []> {
+ let Latency = !add(ICXWriteIMulH.Latency, SkylakeServerModel.LoadLatency);
+}
----------------
courbet wrote:
> typo: `IceLakeModel.LoadLatency`
Nice catch! Thanks.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D108914/new/
https://reviews.llvm.org/D108914
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