[PATCH] D108914: [X86] Copy X86SchedSkylakeServer.td to X86SchedIceLake.td
Clement Courbet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 31 02:05:14 PDT 2021
courbet accepted this revision.
courbet added inline comments.
================
Comment at: llvm/lib/Target/X86/X86SchedIceLake.td:143
+def : WriteRes<WriteIMulHLd, []> {
+ let Latency = !add(ICXWriteIMulH.Latency, SkylakeServerModel.LoadLatency);
+}
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typo: `IceLakeModel.LoadLatency`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D108914/new/
https://reviews.llvm.org/D108914
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