[PATCH] D105799: [X86] Enable half type support in inline assembly constraints

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


================
Comment at: llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll:24
+entry:
+  %0 = tail call <32 x half> asm "vpaddq\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i8 %msk, <32 x half> %x, <32 x half> %y)
+  ret <32 x half> %0
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Maybe use a meaningful instruction, .e.g vaddph.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105799/new/

https://reviews.llvm.org/D105799