[llvm] 44bf0dc - [AArch64][GlobalISel] Mark G_LROUND as legal for s64 dst + s32/s64 src.
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 20 14:23:39 PDT 2021
Author: Jessica Paquette
Date: 2021-08-20T14:22:58-07:00
New Revision: 44bf0dc625abe5a715bd283ce7c9a4ad976b8449
URL: https://github.com/llvm/llvm-project/commit/44bf0dc625abe5a715bd283ce7c9a4ad976b8449
DIFF: https://github.com/llvm/llvm-project/commit/44bf0dc625abe5a715bd283ce7c9a4ad976b8449.diff
LOG: [AArch64][GlobalISel] Mark G_LROUND as legal for s64 dst + s32/s64 src.
Matches SDAG's behaviour for these types.
Differential Revision: https://reviews.llvm.org/D108420
Added:
llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
Modified:
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index d68467ba268b7..dedd7dec9ceed 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -757,6 +757,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
.libcallFor({s128})
.minScalar(0, MinFPScalar);
+ // TODO: Libcall support for s128.
+ getActionDefinitionsBuilder(G_LROUND).legalFor({{s64, s32}, {s64, s64}});
+
getLegacyLegalizerInfo().computeTables();
verify(*ST.getInstrInfo());
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
new file mode 100644
index 0000000000000..c61fa6c3ee147
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+...
+---
+name: s64_s32_legal
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $s0
+ ; CHECK-LABEL: name: s64_s32_legal
+ ; CHECK: liveins: $s0
+ ; CHECK: %copy:_(s32) = COPY $s0
+ ; CHECK: %lround:_(s64) = G_LROUND %copy(s32)
+ ; CHECK: %trunc:_(s32) = G_TRUNC %lround(s64)
+ ; CHECK: $w0 = COPY %trunc(s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ %copy:_(s32) = COPY $s0
+ %lround:_(s64) = G_LROUND %copy(s32)
+ %trunc:_(s32) = G_TRUNC %lround
+ $w0 = COPY %trunc(s32)
+ RET_ReallyLR implicit $w0
+...
+---
+name: s64_s64_legal
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $d0
+ ; CHECK-LABEL: name: s64_s64_legal
+ ; CHECK: liveins: $d0
+ ; CHECK: %copy:_(s64) = COPY $d0
+ ; CHECK: %lround:_(s64) = G_LROUND %copy(s64)
+ ; CHECK: $x0 = COPY %lround(s64)
+ ; CHECK: RET_ReallyLR implicit $x0
+ %copy:_(s64) = COPY $d0
+ %lround:_(s64) = G_LROUND %copy(s64)
+ $x0 = COPY %lround
+ RET_ReallyLR implicit $x0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index 1de81c3a3dcff..244ed98dcc2fb 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -527,8 +527,8 @@
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_LROUND (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. the first uncovered type index: 2, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
# DEBUG-NEXT: G_LLROUND (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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