[llvm] dd19f34 - [AggressiveInstCombine] guard against applying instruction flags with constant folding

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 20 09:22:43 PDT 2021


Author: Sanjay Patel
Date: 2021-08-20T12:22:18-04:00
New Revision: dd19f342fa21a7719b17e33243bda5b69507e4a0

URL: https://github.com/llvm/llvm-project/commit/dd19f342fa21a7719b17e33243bda5b69507e4a0
DIFF: https://github.com/llvm/llvm-project/commit/dd19f342fa21a7719b17e33243bda5b69507e4a0.diff

LOG: [AggressiveInstCombine] guard against applying instruction flags with constant folding

This is a minimized version of a crash reported in:
D108201

Added: 
    

Modified: 
    llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
    llvm/test/Transforms/AggressiveInstCombine/trunc_lshr.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp b/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
index c593e27aa402..10a5f47104d5 100644
--- a/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
+++ b/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
@@ -396,7 +396,8 @@ void TruncInstCombine::ReduceExpressionDag(Type *SclTy) {
       Res = Builder.CreateBinOp((Instruction::BinaryOps)Opc, LHS, RHS);
       // Preserve `exact` flag since truncation doesn't change exactness
       if (Opc == Instruction::LShr)
-        cast<Instruction>(Res)->setIsExact(I->isExact());
+        if (auto *ResI = dyn_cast<Instruction>(Res))
+          ResI->setIsExact(I->isExact());
       break;
     }
     case Instruction::Select: {

diff  --git a/llvm/test/Transforms/AggressiveInstCombine/trunc_lshr.ll b/llvm/test/Transforms/AggressiveInstCombine/trunc_lshr.ll
index df0018d19312..4a05891d1fd2 100644
--- a/llvm/test/Transforms/AggressiveInstCombine/trunc_lshr.ll
+++ b/llvm/test/Transforms/AggressiveInstCombine/trunc_lshr.ll
@@ -234,3 +234,17 @@ define i16 @lshr_negative_operand_but_short(i16 %x) {
   %trunc = trunc i32 %lshr2 to i16
   ret i16 %trunc
 }
+
+; We may encounter unoptimized IR as below,
+; so don't crash by assuming that we can
+; apply instruction flags (exact) if there
+; is no instruction.
+
+define i8 @non_canonical_crash() {
+; CHECK-LABEL: @non_canonical_crash(
+; CHECK-NEXT:    ret i8 8
+;
+  %sh = lshr i32 33, 2
+  %tr = trunc i32 %sh to i8
+  ret i8 %tr
+}


        


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