[PATCH] D105853: [ISel] Expand saddsat and ssubsat via asr and xor
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 18 10:18:37 PDT 2021
dmgreen updated this revision to Diff 367237.
dmgreen added a comment.
Remove the target hook and add some custom lowering for X86 scalar (Thanks to @RKSimon!)
I also altered the PromoteIntRes_ADDSUBSHLSAT from using isOperationLegalOrCustom to isOperationLegal to make sure this custom lowering didn't mess up illegal types - under the assumption that if you are custom lowering ssubsat it is unlikely to be more efficient than a min/max combo.
Some of the vector tests are still a bit larger, but not reliably and on average it seems better. Let me know if any should be specifically focused on.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105853/new/
https://reviews.llvm.org/D105853
Files:
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/AArch64/sadd_sat.ll
llvm/test/CodeGen/AArch64/sadd_sat_plus.ll
llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
llvm/test/CodeGen/AArch64/ssub_sat.ll
llvm/test/CodeGen/AArch64/ssub_sat_plus.ll
llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
llvm/test/CodeGen/AMDGPU/saddsat.ll
llvm/test/CodeGen/AMDGPU/ssubsat.ll
llvm/test/CodeGen/ARM/qdadd.ll
llvm/test/CodeGen/ARM/sadd_sat.ll
llvm/test/CodeGen/ARM/sadd_sat_plus.ll
llvm/test/CodeGen/ARM/ssub_sat.ll
llvm/test/CodeGen/ARM/ssub_sat_plus.ll
llvm/test/CodeGen/PowerPC/sat-add.ll
llvm/test/CodeGen/RISCV/sadd_sat.ll
llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
llvm/test/CodeGen/RISCV/ssub_sat.ll
llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll
llvm/test/CodeGen/X86/combine-add-ssat.ll
llvm/test/CodeGen/X86/sadd_sat.ll
llvm/test/CodeGen/X86/sadd_sat_plus.ll
llvm/test/CodeGen/X86/sadd_sat_vec.ll
llvm/test/CodeGen/X86/ssub_sat.ll
llvm/test/CodeGen/X86/ssub_sat_plus.ll
llvm/test/CodeGen/X86/ssub_sat_vec.ll
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