[PATCH] D108137: [AArch64][Global ISel] Add sext/zext improvements

[Irina Dobrescu via Phabricator via llvm-commits]

Rin added inline comments.


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:2148
   }
+
+  case TargetOpcode::G_ZEXT:
----------------
dmgreen wrote:
> Rin wrote:
> > paquette wrote:
> > > Why did this code move?
> > For the i64 case for G_SEXT we saw that it was choosing the tablegen patterns instead of the switch(Opcode). To avoid that, this code was moved to earlySelect.
> Do we need to move all of this, or can we get away with just doing the i64 in earlySelect?
I thought of that, but it would be a lot of code that gets repeated. But I can to do that instead


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  https://reviews.llvm.org/D108137/new/

https://reviews.llvm.org/D108137