[llvm] e5b15c0 - [X86] Add some tests to show incorrect commuting of vcmpsh instructions.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-08-15T11:36:13-07:00
New Revision: e5b15c01817da62f4b224f7554d5c84daae80d5f

URL: https://github.com/llvm/llvm-project/commit/e5b15c01817da62f4b224f7554d5c84daae80d5f
DIFF: https://github.com/llvm/llvm-project/commit/e5b15c01817da62f4b224f7554d5c84daae80d5f.diff

LOG: [X86] Add some tests to show incorrect commuting of vcmpsh instructions.

Added: 
    llvm/test/CodeGen/X86/select-of-half-constants.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/select-of-half-constants.ll b/llvm/test/CodeGen/X86/select-of-half-constants.ll
new file mode 100644
index 000000000000..e2a2190a1b72
--- /dev/null
+++ b/llvm/test/CodeGen/X86/select-of-half-constants.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512fp16  | FileCheck %s --check-prefixes=X64-AVX512FP16
+
+; This should do a single load into the fp stack for the return, not diddle with xmm registers.
+
+define half @fcmp_select_fp_constants_olt(half %x) nounwind readnone {
+; X64-AVX512FP16-LABEL: fcmp_select_fp_constants_olt:
+; X64-AVX512FP16:       # %bb.0:
+; X64-AVX512FP16-NEXT:    vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; X64-AVX512FP16-NEXT:    vcmpltsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k1
+; X64-AVX512FP16-NEXT:    vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-AVX512FP16-NEXT:    vmovsh %xmm1, %xmm0, %xmm0 {%k1}
+; X64-AVX512FP16-NEXT:    retq
+  %c = fcmp olt half %x, -4.0
+  %r = select i1 %c, half 42.0, half 23.0
+  ret half %r
+}
+
+; FIXME: This should be vcmpgtsh not vcmpltsh.
+define half @fcmp_select_fp_constants_ogt(half %x) nounwind readnone {
+; X64-AVX512FP16-LABEL: fcmp_select_fp_constants_ogt:
+; X64-AVX512FP16:       # %bb.0:
+; X64-AVX512FP16-NEXT:    vcmpltsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k1
+; X64-AVX512FP16-NEXT:    vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; X64-AVX512FP16-NEXT:    vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-AVX512FP16-NEXT:    vmovsh %xmm1, %xmm0, %xmm0 {%k1}
+; X64-AVX512FP16-NEXT:    retq
+  %c = fcmp ogt half %x, -4.0
+  %r = select i1 %c, half 42.0, half 23.0
+  ret half %r
+}
+