[PATCH] D106601: [RISCV] Teach vsetvli insertion pass that it doesn't need to insert vsetvli for unit-stride or strided loads/stores in some cases.

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 11 23:15:29 PDT 2021


rogfer01 accepted this revision.
rogfer01 added a comment.
This revision is now accepted and ready to land.

Sorry for the delay. LGTM.

> You're right. I've added those now. I think we could also do segment load/stores, but I think the switch statement would become even more ridiculous and we should move to TSFlags. So I'd like to look at that as a follow up.

Sure, thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106601/new/

https://reviews.llvm.org/D106601



More information about the llvm-commits mailing list