[PATCH] D106408: Allow rematerialization of virtual reg uses

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:123-125
+  /// in the function. If \p AllowVRegs is set to true then virtual register
+  /// uses are allowed as well for regalloc to opportunistically rematerialize
+  /// an instruction if all used registers happen to be available.
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I don't understand why AllowVRegs needs to be a parameter. Why wouldn't it just always true?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106408/new/

https://reviews.llvm.org/D106408