[PATCH] D106408: Allow rematerialization of virtual reg uses

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 4 09:47:13 PDT 2021


rampitec added a comment.

In D106408#2924775 <https://reviews.llvm.org/D106408#2924775>, @dmgreen wrote:

> OK. I was hoping you would be able to say this is very important for your performance, and have some data to back that up.

I'd love to say that but in fact we have a gordian knot of problems and AMDGPU is the least affected BE by this change:

- We are already doing it for VOP instructions which is the most important kind for AMDGPU, since our implementation of `isReallyTriviallyReMaterializable` does not check for virtual registers unlike `isReallyTriviallyReMaterializableGeneric`, so no change here.
- The other kind of rematerializable instructions are SOP, but most of them either cannot be rematerilized at all because of physreg defs or because of subreg defs, so the impact on SOP will not be huge.
- There would be a difference if MachineLICM hoisted VOP instructions and then it would be impossible to rematerialize them, but that simply does not happen because all VOPs have implicit $exec use and it avoids hoisting anyway.
- The latter is very simple to fix with the new `isIgnorableUse` target callback, but if I do it without this patch it will blindly hoist instructions which will not be remateraialized later.
- In fact MachineLICM needs to have register pressure impact estimate improved, way improved. So if even after all of that it still may have negative impact on performance if such hoisting is enabled.

All of that seems to need a lot of cleanup.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106408/new/

https://reviews.llvm.org/D106408



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