[PATCH] D106408: Allow rematerialization of virtual reg uses

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 4 02:26:49 PDT 2021


dmgreen added a comment.

> For AMDGPU target there is no visible change just yet. It will need at least one more patch to make a difference there. The reason is we are doing this for years now because of the custom `isReallyTriviallyReMaterializable` implementation which skips the check for virtual registers. That needs to be updated in a way similar to this patch so we skip MachineLICM hoisting on the grounds that an instruction is rematerializable without a check that rematerialization will really happen. Then I have no means to measure other targets.
>
> That said AMDGPU is a target where any spilling is extremely expensive. Not just expensive like on CPU targets, but way more expensive. What I see as a result of this patch is a decrease of spilling across the board, which must be a good thing even for a less sensitive target. Code size might increase though, which is generally a case with any rematerialization.

OK. I was hoping you would be able to say this is very important for your performance, and have some data to back that up.

The results I have here look less great.. but looking again, in general it looks OK. Codesize was either flat or smaller by a little, which is good. Performance went up and down depending on the test. The results are not great in places, but looking at the some of the decreases it may just be unlucky, spilling in hot loops where it didn't in the past and behaving a bit chaotically from differences in register allocation. There are some improvements too, to make it generally OK overall.



================
Comment at: llvm/test/CodeGen/Thumb2/ldr-str-imm12.ll:51-52
-; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
-; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
 ; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
   store volatile %union.rec* null, %union.rec** @zz_hold, align 4
----------------
Change this to check for a strd? Or just update the check lines.


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  https://reviews.llvm.org/D106408/new/

https://reviews.llvm.org/D106408



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