[PATCH] D107710: [RISCV][test] Improve tests for (add (mul x, c0), c1)
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 8 08:01:28 PDT 2021
benshi001 updated this revision to Diff 365025.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107710/new/
https://reviews.llvm.org/D107710
Files:
llvm/test/CodeGen/RISCV/addimm-mulimm.ll
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