[PATCH] D107710: [RISCV][test] Improve tests for (add (mul x, c0), c1)

[Ben Shi via Phabricator via llvm-commits]

benshi001 updated this revision to Diff 365021.
benshi001 set the repository for this revision to rG LLVM Github Monorepo.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107710/new/

https://reviews.llvm.org/D107710

Files:
  llvm/test/CodeGen/RISCV/addimm-mulimm.ll

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