[llvm] 6f84d94 - [PowerPC] Fix copy/paste error in scalar_to_vector patterns

[Jinsong Ji via llvm-commits]

Author: Jinsong Ji
Date: 2021-08-06T02:59:01Z
New Revision: 6f84d94b9c56be65f50cdf9ca0f20810ef83cc65

URL: https://github.com/llvm/llvm-project/commit/6f84d94b9c56be65f50cdf9ca0f20810ef83cc65
DIFF: https://github.com/llvm/llvm-project/commit/6f84d94b9c56be65f50cdf9ca0f20810ef83cc65.diff

LOG: [PowerPC] Fix copy/paste error in scalar_to_vector patterns

https://reviews.llvm.org/D100478 refactoring added a copy/paste error
for v8i16 patterns.

Reviewed By: #powerpc, shchenz

Differential Revision: https://reviews.llvm.org/D107609

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrVSX.td
    llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index c0f2aed43a4d3..a4101a8f656da 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -3547,7 +3547,7 @@ defm : ScalToVecWPermute<
   (SUBREG_TO_REG (i64 1), (MTVSRWZ $A), sub_64)>;
 defm : ScalToVecWPermute<
   v8i16, (i32 i32:$A),
-  (SUBREG_TO_REG (i64 1), MovesToVSR.BE_BYTE_0, sub_64),
+  (SUBREG_TO_REG (i64 1), MovesToVSR.BE_HALF_0, sub_64),
   (SUBREG_TO_REG (i64 1), (MTVSRWZ $A), sub_64)>;
 defm : ScalToVecWPermute<
   v4i32, (i32 i32:$A),

diff  --git a/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll b/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll
index 401be39cdf61b..0195005b70eda 100644
--- a/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll
@@ -30,7 +30,7 @@ define i8 @scalar_to_vector_half(i16* nocapture readonly %ad) {
 ; P8BE-LABEL: scalar_to_vector_half:
 ; P8BE:       # %bb.0: # %entry
 ; P8BE-NEXT:    lhz r3, 0(r3)
-; P8BE-NEXT:    sldi r3, r3, 56
+; P8BE-NEXT:    sldi r3, r3, 48
 ; P8BE-NEXT:    mtfprd f0, r3
 ; P8BE-NEXT:    mffprd r3, f0
 ; P8BE-NEXT:    rldicl r3, r3, 8, 56