[llvm] 562c8e1 - [AArch64][GlobalISel] Widen G_IMPLICIT_DEF and G_FREEZE before clamping
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 5 18:25:38 PDT 2021
Author: Jessica Paquette
Date: 2021-08-05T18:21:14-07:00
New Revision: 562c8e14d9f19220fe0a9a35dafa0bcf2485bc0f
URL: https://github.com/llvm/llvm-project/commit/562c8e14d9f19220fe0a9a35dafa0bcf2485bc0f
DIFF: https://github.com/llvm/llvm-project/commit/562c8e14d9f19220fe0a9a35dafa0bcf2485bc0f.diff
LOG: [AArch64][GlobalISel] Widen G_IMPLICIT_DEF and G_FREEZE before clamping
Similar to other cleanup commits which widen instructions before clamping
during legalization. Purpose of this is to avoid weird type breakdowns.
In terms of G_IMPLICIT_DEF, this simplifies legalization for other instructions.
The legalizer has to emit G_IMPLICIT_DEF to legalize certain instructions, so
this can help with emitting merges elsewhere.
Differential Revision: https://reviews.llvm.org/D107604
Added:
Modified:
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 80d9fc16ceea..a71b98f5bc97 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -80,8 +80,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE})
.legalFor({p0, s1, s8, s16, s32, s64})
.legalFor(PackedVectorAllTypeList)
+ .widenScalarToNextPow2(0)
.clampScalar(0, s8, s64)
- .widenScalarToNextPow2(0, 8)
.fewerElementsIf(
[=](const LegalityQuery &Query) {
return Query.Types[0].isVector() &&
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
index 783838856dd5..d9c098250034 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
@@ -119,20 +119,17 @@ body: |
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[UV8:%[0-9]+]]:_(s8), [[UV9:%[0-9]+]]:_(s8), [[UV10:%[0-9]+]]:_(s8), [[UV11:%[0-9]+]]:_(s8), [[UV12:%[0-9]+]]:_(s8), [[UV13:%[0-9]+]]:_(s8), [[UV14:%[0-9]+]]:_(s8), [[UV15:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[UV16:%[0-9]+]]:_(s8), [[UV17:%[0-9]+]]:_(s8), [[UV18:%[0-9]+]]:_(s8), [[UV19:%[0-9]+]]:_(s8), [[UV20:%[0-9]+]]:_(s8), [[UV21:%[0-9]+]]:_(s8), [[UV22:%[0-9]+]]:_(s8), [[UV23:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s8), [[UV1]](s8), [[UV2]](s8), [[UV3]](s8), [[UV4]](s8), [[UV5]](s8), [[UV6]](s8), [[UV7]](s8)
- ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV16]](s8), [[UV17]](s8), [[UV18]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8)
- ; CHECK: [[UV24:%[0-9]+]]:_(s8), [[UV25:%[0-9]+]]:_(s8), [[UV26:%[0-9]+]]:_(s8), [[UV27:%[0-9]+]]:_(s8), [[UV28:%[0-9]+]]:_(s8), [[UV29:%[0-9]+]]:_(s8), [[UV30:%[0-9]+]]:_(s8), [[UV31:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV8]](s8), [[UV9]](s8), [[UV10]](s8), [[UV11]](s8), [[UV12]](s8), [[UV13]](s8), [[UV14]](s8), [[UV15]](s8)
- ; CHECK: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV24]](s8), [[UV25]](s8), [[UV26]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8)
- ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV]], [[MV2]]
- ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV3]]
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16777215
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]
+ ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
- ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C1]]
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C2]]
; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: G_BRCOND %cmp(s1), %bb.1
; CHECK: G_BR %bb.2
@@ -160,20 +157,17 @@ body: |
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[UV8:%[0-9]+]]:_(s8), [[UV9:%[0-9]+]]:_(s8), [[UV10:%[0-9]+]]:_(s8), [[UV11:%[0-9]+]]:_(s8), [[UV12:%[0-9]+]]:_(s8), [[UV13:%[0-9]+]]:_(s8), [[UV14:%[0-9]+]]:_(s8), [[UV15:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[UV16:%[0-9]+]]:_(s8), [[UV17:%[0-9]+]]:_(s8), [[UV18:%[0-9]+]]:_(s8), [[UV19:%[0-9]+]]:_(s8), [[UV20:%[0-9]+]]:_(s8), [[UV21:%[0-9]+]]:_(s8), [[UV22:%[0-9]+]]:_(s8), [[UV23:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
- ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s8), [[UV1]](s8), [[UV2]](s8), [[UV3]](s8), [[UV4]](s8), [[UV5]](s8), [[UV6]](s8), [[UV7]](s8)
- ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV16]](s8), [[UV17]](s8), [[UV18]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8)
- ; CHECK: [[UV24:%[0-9]+]]:_(s8), [[UV25:%[0-9]+]]:_(s8), [[UV26:%[0-9]+]]:_(s8), [[UV27:%[0-9]+]]:_(s8), [[UV28:%[0-9]+]]:_(s8), [[UV29:%[0-9]+]]:_(s8), [[UV30:%[0-9]+]]:_(s8), [[UV31:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV8]](s8), [[UV9]](s8), [[UV10]](s8), [[UV11]](s8), [[UV12]](s8), [[UV13]](s8), [[UV14]](s8), [[UV15]](s8)
- ; CHECK: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV24]](s8), [[UV25]](s8), [[UV26]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8)
- ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV]], [[MV2]]
- ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV3]]
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16777215
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]
+ ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
- ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s64), [[C1]]
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s64), [[C2]]
; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: G_BRCOND %cmp(s1), %bb.1
; CHECK: G_BR %bb.2
@@ -201,20 +195,17 @@ body: |
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32)
- ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV4]](s32), [[C]](s32)
- ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV2]](s32), [[UV3]](s32)
- ; CHECK: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV6]](s32), [[C]](s32)
- ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV]], [[MV2]]
- ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV3]]
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]
+ ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
- ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C1]]
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C2]]
; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: G_BRCOND %cmp(s1), %bb.1
; CHECK: G_BR %bb.2
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
index 73d0512d34ce..a95396a60370 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
@@ -319,9 +319,7 @@ body: |
; CHECK-LABEL: name: s64_from_s264
; CHECK: liveins: $x0
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF]](s64)
- ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s8), [[UV1]](s8), [[UV2]](s8), [[UV3]](s8), [[UV4]](s8), [[UV5]](s8), [[UV6]](s8), [[UV7]](s8)
- ; CHECK: %extract:_(s64) = COPY [[MV]](s64)
+ ; CHECK: %extract:_(s64) = COPY [[DEF]](s64)
; CHECK: $x0 = COPY %extract(s64)
; CHECK: RET_ReallyLR implicit $x0
%val:_(s264) = G_IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
index 228e3a44b0c5..d8f966ed9322 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
@@ -98,3 +98,14 @@ body: |
%0:_(<8 x s16>) = G_IMPLICIT_DEF
$q0 = COPY %0
...
+---
+name: test_implicit_def_s88
+body: |
+ bb.0:
+ liveins:
+ ; CHECK-LABEL: name: test_implicit_def_s88
+ ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+ ; CHECK: $x0 = COPY [[DEF]](s64)
+ %undef:_(s88) = G_IMPLICIT_DEF
+ %trunc:_(s64) = G_TRUNC %undef
+ $x0 = COPY %trunc(s64)
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