[llvm] 23651c5 - [PowerPC][AIX] Create multiple constant sections.
Sean Fertile via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 5 18:20:44 PDT 2021
Author: Sean Fertile
Date: 2021-08-05T21:19:16-04:00
New Revision: 23651c5ae02a209ff214e4283dddb5ab65d1003a
URL: https://github.com/llvm/llvm-project/commit/23651c5ae02a209ff214e4283dddb5ab65d1003a
DIFF: https://github.com/llvm/llvm-project/commit/23651c5ae02a209ff214e4283dddb5ab65d1003a.diff
LOG: [PowerPC][AIX] Create multiple constant sections.
Fixes issue where late materialized constants can be more strictly
aligned then their containing csect.
Differential Revision: https://reviews.llvm.org/D103103
Added:
llvm/test/CodeGen/PowerPC/aix-constant-align.ll
llvm/test/CodeGen/PowerPC/aix-rodata-align.ll
Modified:
llvm/include/llvm/MC/MCObjectFileInfo.h
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
llvm/lib/MC/MCObjectFileInfo.cpp
llvm/test/CodeGen/PowerPC/aix-space.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCObjectFileInfo.h b/llvm/include/llvm/MC/MCObjectFileInfo.h
index 8ae86ef2a5746..1bdae0bc541aa 100644
--- a/llvm/include/llvm/MC/MCObjectFileInfo.h
+++ b/llvm/include/llvm/MC/MCObjectFileInfo.h
@@ -225,6 +225,8 @@ class MCObjectFileInfo {
// XCOFF specific sections
MCSection *TOCBaseSection = nullptr;
+ MCSection *ReadOnly8Section = nullptr;
+ MCSection *ReadOnly16Section = nullptr;
public:
void initMCObjectFileInfo(MCContext &MCCtx, bool PIC,
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index add34eccc1f37..3383f5a64a5ff 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2414,7 +2414,20 @@ bool TargetLoweringObjectFileXCOFF::shouldPutJumpTableInFunctionSection(
MCSection *TargetLoweringObjectFileXCOFF::getSectionForConstant(
const DataLayout &DL, SectionKind Kind, const Constant *C,
Align &Alignment) const {
- //TODO: Enable emiting constant pool to unique sections when we support it.
+ // TODO: Enable emiting constant pool to unique sections when we support it.
+ if (Alignment > Align(16))
+ report_fatal_error("Alignments greater than 16 not yet supported.");
+
+ if (Alignment == Align(8)) {
+ assert(ReadOnly8Section && "Section should always be initialized.");
+ return ReadOnly8Section;
+ }
+
+ if (Alignment == Align(16)) {
+ assert(ReadOnly16Section && "Section should always be initialized.");
+ return ReadOnly16Section;
+ }
+
return ReadOnlySection;
}
diff --git a/llvm/lib/MC/MCObjectFileInfo.cpp b/llvm/lib/MC/MCObjectFileInfo.cpp
index 7ea1106068b74..bebbc9d83f6a1 100644
--- a/llvm/lib/MC/MCObjectFileInfo.cpp
+++ b/llvm/lib/MC/MCObjectFileInfo.cpp
@@ -896,6 +896,19 @@ void MCObjectFileInfo::initXCOFFMCObjectFileInfo(const Triple &T) {
".rodata", SectionKind::getReadOnly(),
XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RO, XCOFF::XTY_SD),
/* MultiSymbolsAllowed*/ true);
+ ReadOnlySection->setAlignment(Align(4));
+
+ ReadOnly8Section = Ctx->getXCOFFSection(
+ ".rodata.8", SectionKind::getReadOnly(),
+ XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RO, XCOFF::XTY_SD),
+ /* MultiSymbolsAllowed*/ true);
+ ReadOnly8Section->setAlignment(Align(8));
+
+ ReadOnly16Section = Ctx->getXCOFFSection(
+ ".rodata.16", SectionKind::getReadOnly(),
+ XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RO, XCOFF::XTY_SD),
+ /* MultiSymbolsAllowed*/ true);
+ ReadOnly16Section->setAlignment(Align(16));
TLSDataSection = Ctx->getXCOFFSection(
".tdata", SectionKind::getThreadData(),
diff --git a/llvm/test/CodeGen/PowerPC/aix-constant-align.ll b/llvm/test/CodeGen/PowerPC/aix-constant-align.ll
new file mode 100644
index 0000000000000..a8932eb0abba7
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-constant-align.ll
@@ -0,0 +1,33 @@
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 < %s | \
+; RUN: FileCheck %s --check-prefixes=CHECK,CHECK32
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr7 < %s | \
+; RUN: FileCheck %s --check-prefixes=CHECK,CHECK64
+
+
+ at NOT_PI = constant double 3.000000e+00, align 8
+
+define double @PIDouble() #0 {
+ entry:
+ ret double 3.141590e+00
+}
+
+define float @PIfloat() #0 {
+ entry:
+ ret float 0x400921FA00000000
+}
+
+; CHECK: .csect .rodata.8[RO],3
+; CHECK-NEXT: .align 3
+; CHECK-NEXT: L..CPI0_0:
+; CHECK32-NEXT: .vbyte 4, 1074340345
+; CHECK32-NEXT: .vbyte 4, 4028335726
+; CHECK64-NEXT: .vbyte 8, 0x400921f9f01b866e
+
+
+; CHECK: .csect .rodata[RO],2
+; CHECK-NEXT: .align 2
+; CHECK-NEXT: L..CPI1_0:
+; CHECK-NEXT: .vbyte 4, 0x40490fd0
+
+; CHECK: .csect NOT_PI[RO],3
diff --git a/llvm/test/CodeGen/PowerPC/aix-rodata-align.ll b/llvm/test/CodeGen/PowerPC/aix-rodata-align.ll
new file mode 100644
index 0000000000000..477174df8cd98
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-rodata-align.ll
@@ -0,0 +1,41 @@
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 \
+; RUN: -mattr=+altivec -data-sections=false < %s | \
+; RUN: FileCheck %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr7 \
+; RUN: -mattr=+altivec -data-sections=false < %s | \
+; RUN: FileCheck %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 \
+; RUN: -mattr=+altivec -data-sections=false -filetype=obj -o %t.o < %s
+; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=OBJ %s
+
+define <16 x i8> @test() {
+entry:
+ ret <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
+}
+; CHECK: .csect .rodata.16[RO],4
+; CHECK-NEXT: .align 4
+; CHECK-NEXT: L..CPI0_0:
+; CHECK-NEXT: .byte 0 # 0x0
+; CHECK-NEXT: .byte 1 # 0x1
+; CHECK-NEXT: .byte 2 # 0x2
+; CHECK-NEXT: .byte 3 # 0x3
+; CHECK-NEXT: .byte 4 # 0x4
+; CHECK-NEXT: .byte 5 # 0x5
+; CHECK-NEXT: .byte 6 # 0x6
+; CHECK-NEXT: .byte 7 # 0x7
+; CHECK-NEXT: .byte 8 # 0x8
+; CHECK-NEXT: .byte 9 # 0x9
+; CHECK-NEXT: .byte 10 # 0xa
+; CHECK-NEXT: .byte 11 # 0xb
+; CHECK-NEXT: .byte 12 # 0xc
+; CHECK-NEXT: .byte 13 # 0xd
+; CHECK-NEXT: .byte 14 # 0xe
+; CHECK-NEXT: .byte 15 # 0xf
+
+; OBJ-LABEL: <.rodata.16>:
+; OBJ-NEXT: 00 01 02 03
+; OBJ-NEXT: 04 05 06 07
+; OBJ-NEXT: 08 09 0a 0b
+; OBJ-NEXT: 0c 0d 0e 0f
diff --git a/llvm/test/CodeGen/PowerPC/aix-space.ll b/llvm/test/CodeGen/PowerPC/aix-space.ll
index 27a87676fba2f..bf92133ae54df 100644
--- a/llvm/test/CodeGen/PowerPC/aix-space.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-space.ll
@@ -1,17 +1,8 @@
; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
- at a = common global double 0.000000e+00, align 8
+ at vi = global <4 x i32> zeroinitializer, section "custom_section", align 16
+ at f = global float 0x400921E480000000, section "custom_section", align 16
-; Get some constants into the constant pool that need spacing for alignment
-define void @e() {
-entry:
- %0 = load double, double* @a, align 8
- %mul = fmul double 1.500000e+00, %0
- store double %mul, double* @a, align 8
- %mul1 = fmul double 0x3F9C71C71C71C71C, %0
- store double %mul1, double* @a, align 8
- ret void
-}
-
-; CHECK: .space 4
+; CHECK: .space 16
; CHECK-NOT: .zero
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