[PATCH] D107512: [AArch64][GlobalISel] Mark v16s8 <- v8s8, v8s8 G_CONCAT_VECTOR as legal

[Jessica Paquette via Phabricator via llvm-commits]

paquette updated this revision to Diff 364513.
paquette added a comment.

Add a selection testcase with real inputs.

Looks like there's a specific pattern for undef and a specific pattern for real inputs, so let's just test both.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107512/new/

https://reviews.llvm.org/D107512

Files:
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-concat-vectors.mir

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