[PATCH] D106471: [DAGCombiner][RISCV][AMDGPU] Call SimplifyDemandedBits at the end of visitMULHU to enable known bits contant folding.

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 4 12:31:21 PDT 2021


RKSimon added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4582
+  // We don't have demanded bits support for MULHU so this just enables constant
+  // folding based on known bits.
+  if (SimplifyDemandedBits(SDValue(N, 0)))
----------------
Out of interest, do we need MULHU support in SimplifyDemandedBits?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106471/new/

https://reviews.llvm.org/D106471



More information about the llvm-commits mailing list