[PATCH] D106471: [DAGCombiner][RISCV][AMDGPU] Call SimplifyDemandedBits at the end of visitMULHU to enable known bits contant folding.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 4 12:14:11 PDT 2021


craig.topper updated this revision to Diff 364211.
craig.topper added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106471/new/

https://reviews.llvm.org/D106471

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll
  llvm/test/CodeGen/RISCV/rvv/stepvector.ll

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