[PATCH] D106549: [AArch64][SVE] Combine bitcasts to predicate types with vector inserts of loads

[Bradley Smith via Phabricator via llvm-commits]

bsmith updated this revision to Diff 363687.
bsmith marked 9 inline comments as done.
bsmith added a comment.

- Only perform optimization on simple loads/stores
- Remove unnecessary dyn_casts
- Move insertion point for load case to the load
- Add testcase for load insertion point


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106549/new/

https://reviews.llvm.org/D106549

Files:
  llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
  llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
  llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll

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