[PATCH] D107306: [AArch64] Prefer ZIP1 over INS to lower concat_vectors.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

> ZIP1 should have comparable performance

I think on a CPU with 64bit NEON pipelines a zip will count as a 128bit instruction, a INS as a single 64bit instruction.
i.e Note 1 in 4.17 of the Cortex-A55 optimization guide: https://developer.arm.com/documentation/epm128372/2-0/


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https://reviews.llvm.org/D107306