[PATCH] D106518: [RISCV] Disable EEW=64 for index values when XLEN=32.
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 2 01:46:32 PDT 2021
jacquesguan updated this revision to Diff 363399.
jacquesguan added a comment.
remove newlines in error string.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D106518/new/
https://reviews.llvm.org/D106518
Files:
clang/include/clang/Basic/riscv_vector.td
clang/utils/TableGen/RISCVVEmitter.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
llvm/test/CodeGen/RISCV/rvv/invalid-eew.ll
llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
llvm/test/MC/RISCV/rvv/invalid-eew.s
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