[PATCH] D105871: Followup to D99355: implementation of sdag support for vp load/store/gather/scatter.

Wed Jul 28 02:24:44 PDT 2021

frasercrmck added a comment.

In D105871#2909218 <https://reviews.llvm.org/D105871#2909218>, @hussainjk wrote:

> In D105871#2904152 <https://reviews.llvm.org/D105871#2904152>, @frasercrmck wrote:
>
>> This patch also needs to extend `SelectionDAGBuilder` to custom-build the "mem" nodes from the intrinsics. Otherwise we won't be creating the `SDNode`s correctly, e.g. there'll be an invalid `MachineMemOperand`.
>
> As far as I can tell, this is being done correctly through `SelectionDAGBuilder::visitVectorPredicationIntrinsic`. Is this not the case?

No I don't believe that's the case. There's quite a bit that needs to change for these nodes: we need an in/out chain and we need to create a MachineMemOperand.

Yesterday I tried to build on top of this patch to support the VP nodes in RISC-V but quickly hit segfaults in `AddNodeIDCustom`.

I believe this change <https://github.com/sx-aurora-dev/llvm-project/commit/1c7acf886e50d1bdd9c8c2c6b749f62ba75db6c2#diff-34ee9626bb04949852b8ca80ba74ba7e9a43d7875410dcf993d36720f3ea6058> in the reference patch shows the kind of think we need.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105871/new/

https://reviews.llvm.org/D105871