[PATCH] D106139: [DAGCombine] Combine srX of add that intends to get the carry as uaddo

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 27 21:44:30 PDT 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:8740
 
+  if (SDValue Overflow = combineSRXToOverflow(N))
+    return Overflow;
----------------
I should have phrased by question better. Is there any reason to check this in visitSRA or can we just let it get converted to SRL and matched in visitSRL?


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:8817
+  SDValue UAddO = DAG.getNode(
+      ISD::UADDO, SDLoc(N0), DAG.getVTList(N0NoZextLHS.getValueType(), MVT::i1),
+      N0NoZextLHS, N0NoZextRHS);
----------------
i1 is likely not a legal type. Do we need to check that we're before legalize types?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106139/new/

https://reviews.llvm.org/D106139



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