[PATCH] D106273: [SVE][AArch64] Improve code generation for vector_splice for Imm > 0

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:2411
+            (EXT_ZZI  ZPR:$Z1, ZPR:$Z2, sve_ext_imm_0_1:$index)>;
   }
 
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The 'AddedComplexity' isn't needed for these patterns.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106273/new/

https://reviews.llvm.org/D106273