[PATCH] D106286: [RISCV] Add a test showing an incorrect vsetvli insertion

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 20 03:41:55 PDT 2021


frasercrmck added a comment.

Sorry about that @craig.topper  I was rushing it. The test case is now reduced a lot better. I believe it's an issue where the `vmv.x.s` "doesn't need" an AVL (it's `RISCV::NoRegister`) because the operation is VL-agnostic, as it were, so we fall into a trap where we insert a `vsetvli zero,zero` even though that's an illegal attempt to preserve VL.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106286/new/

https://reviews.llvm.org/D106286



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