[PATCH] D106265: [AArch64][SVE] Zero-overhead transfer between Neon and SVE registers

[Peter Waller via Phabricator via llvm-commits]

peterwaller-arm updated this revision to Diff 359757.
peterwaller-arm added a comment.

- Fix dag-combine-insert-elt.ll tests
- Remove extraneous blankline


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106265/new/

https://reviews.llvm.org/D106265

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/CodeGen/AArch64/dag-combine-insert-elt.ll
  llvm/test/CodeGen/AArch64/sve-insert-element.ll
  llvm/test/CodeGen/AArch64/sve-ld-post-inc.ll
  llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll

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