[llvm] fd7a54c - [DAG] DAGCombiner::foldSelectOfBinops - propagate the common flags to the merged binop

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-07-18T18:38:59+01:00
New Revision: fd7a54c709083f79d8d1062156b9e386a506b189

URL: https://github.com/llvm/llvm-project/commit/fd7a54c709083f79d8d1062156b9e386a506b189
DIFF: https://github.com/llvm/llvm-project/commit/fd7a54c709083f79d8d1062156b9e386a506b189.diff

LOG: [DAG] DAGCombiner::foldSelectOfBinops - propagate the common flags to the merged binop

As discussed on D106058 - we were failing to keep the common flags. This matches the behaviour in InstCombinerImpl::foldSelectOpOp.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/test/CodeGen/X86/combine-shl.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4f152c6218f4..7ff01fa0aff6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -22390,7 +22390,10 @@ SDValue DAGCombiner::foldSelectOfBinops(SDNode *N) {
   if (N1.getOperand(1) == N2.getOperand(1)) {
     SDValue NewSel =
         DAG.getSelect(DL, VT, N0, N1.getOperand(0), N2.getOperand(0));
-    return DAG.getNode(BinOpc, DL, VT, NewSel, N1.getOperand(1));
+    SDValue NewBinOp = DAG.getNode(BinOpc, DL, VT, NewSel, N1.getOperand(1));
+    NewBinOp->setFlags(N1->getFlags());
+    NewBinOp->intersectFlagsWith(N2->getFlags());
+    return NewBinOp;
   }
 
   // Fold select(cond, binop(x, y), binop(x, z))
@@ -22401,7 +22404,10 @@ SDValue DAGCombiner::foldSelectOfBinops(SDNode *N) {
       VT == N2.getOperand(1).getValueType()) {
     SDValue NewSel =
         DAG.getSelect(DL, VT, N0, N1.getOperand(1), N2.getOperand(1));
-    return DAG.getNode(BinOpc, DL, VT, N1.getOperand(0), NewSel);
+    SDValue NewBinOp = DAG.getNode(BinOpc, DL, VT, N1.getOperand(0), NewSel);
+    NewBinOp->setFlags(N1->getFlags());
+    NewBinOp->intersectFlagsWith(N2->getFlags());
+    return NewBinOp;
   }
 
   // TODO: Handle isCommutativeBinOp patterns as well?

diff  --git a/llvm/test/CodeGen/X86/combine-shl.ll b/llvm/test/CodeGen/X86/combine-shl.ll
index 142e03377d0d..1e1abffb9b32 100644
--- a/llvm/test/CodeGen/X86/combine-shl.ll
+++ b/llvm/test/CodeGen/X86/combine-shl.ll
@@ -474,7 +474,6 @@ define i32 @combine_shl_ge_sel_ashr_extact0(i32 %x, i32 %y, i32 %z) {
 ; CHECK-NEXT:    testl %edx, %edx
 ; CHECK-NEXT:    cmovel %esi, %edi
 ; CHECK-NEXT:    leal (,%rdi,4), %eax
-; CHECK-NEXT:    andl $-32, %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp ne i32 %z, 0
   %ashrx = ashr exact i32 %x, 3