[llvm] 52cd0c5 - [X86] Regenerate twoaddr-lea.ll test checks.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-07-16T17:43:36+01:00
New Revision: 52cd0c5a8d8db57349385f72b4ea0fa8d71d5b63

URL: https://github.com/llvm/llvm-project/commit/52cd0c5a8d8db57349385f72b4ea0fa8d71d5b63
DIFF: https://github.com/llvm/llvm-project/commit/52cd0c5a8d8db57349385f72b4ea0fa8d71d5b63.diff

LOG: [X86] Regenerate twoaddr-lea.ll test checks.

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/twoaddr-lea.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/twoaddr-lea.ll b/llvm/test/CodeGen/X86/twoaddr-lea.ll
index 716d20d63c44..23853c3ee183 100644
--- a/llvm/test/CodeGen/X86/twoaddr-lea.ll
+++ b/llvm/test/CodeGen/X86/twoaddr-lea.ll
@@ -1,3 +1,6 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s
+
 ;; X's live range extends beyond the shift, so the register allocator
 ;; cannot coalesce it with Y.  Because of this, a copy needs to be
 ;; emitted before the shift to save the register value before it is
@@ -5,14 +8,18 @@
 ;; allocator turns the shift into an LEA.  This also occurs for ADD.
 
 ; Check that the shift gets turned into an LEA.
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s
 
 @G = external global i32
 
 define i32 @test1(i32 %X) nounwind {
 ; CHECK-LABEL: test1:
-; CHECK: movl %edi, %eax
-; CHECK: leal 1(%rax)
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    leal 1(%rax), %ecx
+; CHECK-NEXT:    movq _G at GOTPCREL(%rip), %rdx
+; CHECK-NEXT:    movl %ecx, (%rdx)
+; CHECK-NEXT:    ## kill: def $eax killed $eax killed $rax
+; CHECK-NEXT:    retq
         %Z = add i32 %X, 1
         store volatile i32 %Z, i32* @G
         ret i32 %X
@@ -22,12 +29,15 @@ define i32 @test1(i32 %X) nounwind {
 ; The second add should not be transformed to leal nor should it be
 ; commutted (which would require inserting a copy).
 define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {
-entry:
 ; CHECK-LABEL: test2:
-; CHECK: leal
-; CHECK-NEXT: addl
-; CHECK-NEXT: addl
-; CHECK-NEXT: ret
+; CHECK:       ## %bb.0: ## %entry
+; CHECK-NEXT:    ## kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    ## kill: def $edi killed $edi def $rdi
+; CHECK-NEXT:    leal (%rdi,%rsi), %eax
+; CHECK-NEXT:    addl %edx, %eax
+; CHECK-NEXT:    addl %ecx, %eax
+; CHECK-NEXT:    retq
+entry:
  %add = add i32 %b, %a
  %add3 = add i32 %add, %c
  %add5 = add i32 %add3, %d
@@ -36,11 +46,11 @@ entry:
 
 ; rdar://9002648
 define i64 @test3(i64 %x) nounwind readnone ssp {
-entry:
 ; CHECK-LABEL: test3:
-; CHECK: leaq (%rdi,%rdi), %rax
-; CHECK-NOT: addq
-; CHECK-NEXT: ret
+; CHECK:       ## %bb.0: ## %entry
+; CHECK-NEXT:    leaq (%rdi,%rdi), %rax
+; CHECK-NEXT:    retq
+entry:
   %0 = shl i64 %x, 1
   ret i64 %0
 }
@@ -50,8 +60,60 @@ entry:
 
 ; Test that liveness is properly updated and we do not encounter the
 ; assert/crash from http://llvm.org/PR28301
-; CHECK-LABEL: ham
 define void @ham() {
+; CHECK-LABEL: ham:
+; CHECK:       ## %bb.0: ## %bb
+; CHECK-NEXT:    xorl %r8d, %r8d
+; CHECK-NEXT:    movq _global at GOTPCREL(%rip), %rdx
+; CHECK-NEXT:    movq _global2 at GOTPCREL(%rip), %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $10, %eax
+; CHECK-NEXT:    jle LBB3_2
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB3_6: ## %bb2
+; CHECK-NEXT:    ## =>This Loop Header: Depth=1
+; CHECK-NEXT:    ## Child Loop BB3_7 Depth 2
+; CHECK-NEXT:    movl (%rdx), %edi
+; CHECK-NEXT:    leal (%rdi,%rax), %ecx
+; CHECK-NEXT:    movslq %ecx, %rcx
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB3_7: ## %bb6
+; CHECK-NEXT:    ## Parent Loop BB3_6 Depth=1
+; CHECK-NEXT:    ## => This Inner Loop Header: Depth=2
+; CHECK-NEXT:    movq %rax, (%rsi)
+; CHECK-NEXT:    movq %rcx, (%rsi)
+; CHECK-NEXT:    movl %edi, (%rdx)
+; CHECK-NEXT:    testb %r8b, %r8b
+; CHECK-NEXT:    jne LBB3_7
+; CHECK-NEXT:  ## %bb.8: ## %bb9
+; CHECK-NEXT:    ## in Loop: Header=BB3_6 Depth=1
+; CHECK-NEXT:    addq $4, %rax
+; CHECK-NEXT:    cmpl $10, %eax
+; CHECK-NEXT:    jg LBB3_6
+; CHECK-NEXT:  LBB3_2: ## %bb3.preheader
+; CHECK-NEXT:    xorl %ecx, %ecx
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB3_3: ## %bb3
+; CHECK-NEXT:    ## =>This Loop Header: Depth=1
+; CHECK-NEXT:    ## Child Loop BB3_4 Depth 2
+; CHECK-NEXT:    movq %rcx, %rdx
+; CHECK-NEXT:    addq $4, %rcx
+; CHECK-NEXT:    movl %eax, %esi
+; CHECK-NEXT:    subl %edx, %esi
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB3_4: ## %bb4
+; CHECK-NEXT:    ## Parent Loop BB3_3 Depth=1
+; CHECK-NEXT:    ## => This Inner Loop Header: Depth=2
+; CHECK-NEXT:    testl %esi, %esi
+; CHECK-NEXT:    jne LBB3_9
+; CHECK-NEXT:  ## %bb.5: ## %bb5
+; CHECK-NEXT:    ## in Loop: Header=BB3_4 Depth=2
+; CHECK-NEXT:    addq $1, %rdx
+; CHECK-NEXT:    cmpq %rcx, %rdx
+; CHECK-NEXT:    jl LBB3_4
+; CHECK-NEXT:    jmp LBB3_3
+; CHECK-NEXT:  LBB3_9: ## %bb8
+; CHECK-NEXT:    ud2
 bb:
   br label %bb1
 
@@ -68,9 +130,6 @@ bb2:
   br label %bb6
 
 bb3:
-; CHECK: LBB3_3:
-; CHECK: addq $4, %r
-; CHECK: subl %e
   %tmp14 = phi i64 [ %tmp15, %bb5 ], [ 0, %bb1 ]
   %tmp15 = add nuw i64 %tmp14, 4
   %tmp16 = trunc i64 %tmp14 to i32