[PATCH] D105800: [AMDGPU] Tidy SReg/SGPR definitions using template class
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 16 05:03:41 PDT 2021
foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.
Looks good, just nits inline.
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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:714
+ SIRegisterTuples regList,
+ SIRegisterTuples ttmpList = regList,
+ int copyCost = !sra(!add(numRegs, 1), 1),
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Wouldn't it be a bit simpler to use `[]` as the default, and test it with !empty?
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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:715
+ SIRegisterTuples ttmpList = regList,
+ int copyCost = !sra(!add(numRegs, 1), 1),
+ bit hasTTMP = !ne(regList, ttmpList),
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Isn't defvar a better way of defining all these variables, instead of making them optional arguments that are never actually used?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D105800/new/
https://reviews.llvm.org/D105800
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