[PATCH] D105994: [SVE] Add folds for sign and zero extends of vscale

[Matt D. via Phabricator via llvm-commits]

Matt added inline comments.


================
Comment at: llvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll:43
+entry:
+  %0 = call i16 at llvm.vscale.i16()
+  %1 = zext i16 %0 to i64
----------------
Nit: Missing space.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105994/new/

https://reviews.llvm.org/D105994