[PATCH] D105994: [SVE] Add folds for sign and zero extends of vscale
Dylan Fleming via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 14 08:50:22 PDT 2021
DylanFleming-arm created this revision.
Herald added subscribers: psnobl, hiraditya, tschuett.
Herald added a reviewer: efriedma.
DylanFleming-arm requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D105994
Files:
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
llvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll
Index: llvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll
@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i64 @vscale_SExt_i32toi64() {
+; CHECK-LABEL: @vscale_SExt_i32toi64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: ret i64 [[TMP0]]
+entry:
+ %0 = call i32 @llvm.vscale.i32()
+ %1 = sext i32 %0 to i64
+ ret i64 %1
+}
+
+define i32 @vscale_SExt_i8toi32() {
+; CHECK-LABEL: @vscale_SExt_i8toi32(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
+; CHECK-NEXT: ret i32 [[TMP0]]
+entry:
+ %0 = call i8 @llvm.vscale.i8()
+ %1 = sext i8 %0 to i32
+ ret i32 %1
+}
+
+define i64 @vscale_ZExt_i32toi64() {
+; CHECK-LABEL: @vscale_ZExt_i32toi64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: ret i64 [[TMP0]]
+entry:
+ %0 = call i32 @llvm.vscale.i32()
+ %1 = zext i32 %0 to i64
+ ret i64 %1
+}
+
+define i64 @vscale_ZExt_i16toi64() {
+; CHECK-LABEL: @vscale_ZExt_i16toi64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: ret i64 [[TMP0]]
+entry:
+ %0 = call i16 at llvm.vscale.i16()
+ %1 = zext i16 %0 to i64
+ ret i64 %1
+}
+
+declare i8 @llvm.vscale.i8()
+declare i16 @llvm.vscale.i16()
+declare i32 @llvm.vscale.i32()
Index: llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -1361,6 +1361,11 @@
return BinaryOperator::CreateXor(Builder.CreateAnd(X, ZC), ZC);
}
+ if (match(Src, m_VScale(DL))) {
+ Value *VScale = Builder.CreateVScale(ConstantInt::get(DestTy, 1));
+ return replaceInstUsesWith(CI, VScale);
+ }
+
return nullptr;
}
@@ -1605,6 +1610,11 @@
return BinaryOperator::CreateAShr(A, NewShAmt);
}
+ if (match(Src, m_VScale(DL))) {
+ Value *VScale = Builder.CreateVScale(ConstantInt::get(DestTy, 1));
+ return replaceInstUsesWith(CI, VScale);
+ }
+
return nullptr;
}
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