[PATCH] D105214: [ARM] RELA relocations for 32bit ARM ignore the addend.

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added inline comments.


================
Comment at: llvm/lib/Object/RelocationResolver.cpp:318
+  // for supplying the correct values for LocData and Addend, i.e.
+  // Addend == 0 for REL and LocData == 0 for RELA.
   switch (Type) {
----------------
Add an assert


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Comment at: llvm/test/DebugInfo/ARM/dwarfdump-rela.yaml:24
+    Type:            SHT_PROGBITS
+    AddressAlign:    0x1
+    Content:         17000000050001040000000001A000000000000000020000000000
----------------
Delete AddressAlign:    0x1


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Comment at: llvm/test/DebugInfo/ARM/dwarfdump-rela.yaml:33
+    AddressAlign:    0x1
+    EntSize:         0x0
+  - Name:            .rel.debug_info
----------------
Delete EntSize:         0x0


================
Comment at: llvm/test/DebugInfo/ARM/dwarfdump-rela.yaml:34
+    EntSize:         0x0
+  - Name:            .rel.debug_info
+    Type:            SHT_RELA
----------------
wolfgangp wrote:
> MaskRay wrote:
> > rela
> It it's OK with you, I fancy leaving the name as 'rel', just to make sure we don't key off the name of the section instead of the section type.
I think it is not the test's purpose to test this, so I'd avoid it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105214/new/

https://reviews.llvm.org/D105214