[PATCH] D105742: [AMDGPU] Make V_CVT_I32_F64/V_CVT_F64_I32 rematerializable.
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 9 15:00:18 PDT 2021
rampitec created this revision.
rampitec added a reviewer: arsenm.
Herald added subscribers: foad, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
rampitec requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.
This is a pilot change to verify the logic. The rest will be
done in a same way, at least the rest of VOP1.
Not quite expected this has also changed how RA allocates
registers even if it does not rematerialize these instructions
with at least one small regression in the fneg-combines.ll.
https://reviews.llvm.org/D105742
Files:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/VOP1Instructions.td
llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
llvm/test/CodeGen/AMDGPU/fneg-combines.ll
llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
llvm/test/CodeGen/AMDGPU/half.ll
llvm/test/CodeGen/AMDGPU/remat-vop.mir
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