[PATCH] D105761: [lld][AMDGPU] Handle R_AMDGPU_REL16 relocation.

[Hafiz Abid Qadeer via Phabricator via llvm-commits]

abidh created this revision.
abidh added reviewers: dp, kzhuravl, MaskRay, arsenm, tstellar.
Herald added subscribers: kerbowa, arichardson, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, emaste.
abidh requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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This patch is a followup patch to https://reviews.llvm.org/D105760 which adds this relocation. This handles the relocation in lld.

The s_branch family of instruction does the following:
PC = PC + signext(simm * 4) + 4

so we we do the opposite on the target address before writing it in the instruction stream.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105761

Files:
  lld/ELF/Arch/AMDGPU.cpp
  lld/test/ELF/amdgpu-relocs2.s


Index: lld/test/ELF/amdgpu-relocs2.s
===================================================================
--- /dev/null
+++ lld/test/ELF/amdgpu-relocs2.s
@@ -0,0 +1,33 @@
+# REQUIRES: amdgpu
+# RUN: llvm-mc -filetype=obj -triple=amdgcn--amdhsa -mcpu=fiji %s -o %t.o
+# RUN: echo "SECTIONS { \
+# RUN:       . = 0x1000;                             \
+# RUN:       .text.likely : { *(.text.likely) }     \
+# RUN:       . = 0x2000;                             \
+# RUN:       .text : { *(.text) }                   \
+# RUN:       . = 0x3000;                             \
+# RUN:       .text.unlikely : { *(.text.unlikely) } \
+# RUN:     }" > %t.script
+# RUN: ld.lld %t.o -o %t -T %t.script
+# RUN: llvm-objdump -d %t | FileCheck %s
+
+
+.section .text.likely
+hot1:
+  s_add_i32 s15, s15, 1
+hot2:
+  s_add_i32 s13, s13, 1
+.text
+foo:
+  s_branch cold2
+  s_branch hot2
+.section .text.unlikely
+cold1:
+  s_add_i32 s15, s15, 1
+  s_add_i32 s14, s14, 1
+cold2:
+  s_add_i32 s13, s13, 1
+
+# CHECK:  <foo>
+# CHECK-NEXT: s_branch 1025
+# CHECK-NEXT: s_branch 64511
Index: lld/ELF/Arch/AMDGPU.cpp
===================================================================
--- lld/ELF/Arch/AMDGPU.cpp
+++ lld/ELF/Arch/AMDGPU.cpp
@@ -139,6 +139,12 @@
   case R_AMDGPU_REL32_HI:
     write32le(loc, val >> 32);
     break;
+  case R_AMDGPU_REL16: {
+    int64_t sval = static_cast<int64_t>(val);
+    checkInt(loc, ((sval - 4) / 4), 16, rel);
+    write16le(loc, (sval - 4) / 4);
+    break;
+  }
   default:
     llvm_unreachable("unknown relocation");
   }
@@ -154,6 +160,7 @@
   case R_AMDGPU_REL32_LO:
   case R_AMDGPU_REL32_HI:
   case R_AMDGPU_REL64:
+  case R_AMDGPU_REL16:
     return R_PC;
   case R_AMDGPU_GOTPCREL:
   case R_AMDGPU_GOTPCREL32_LO:


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