[PATCH] D105714: WIP/RFC: Generic MachineInstr convenience wrappers.

[Amara Emerson via Phabricator via llvm-commits]

aemerson added a comment.

One additional use for this could be as a replacement for passing around MachineInstr when a specific operation is expected.

  Register doFooOnLoad(MachineInstr &MI) {
    assert(MI.getOpcode() == TargetOpcode::G_LOAD);
    ...

could be:

  Register dooFooOnLoad(GLoad Load) {
    Load.validate();
    ...


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105714/new/

https://reviews.llvm.org/D105714